FETs

8 Key excerpts on "FETs"

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  eBook - ePub

  Introductory Quantum Mechanics for Applied Nanotechnology

  • Dae Mann Kim(Author)
  • 2016(Publication Date)
  • Wiley-VCH

    (Publisher)

  Chapter 19 Field-Effect Transistors

  The idea of field-effect transistors (FETs) was conceived as early as 1930s and successfully implemented in 1960s. The advantages of FET as exemplified by MOSFET consist of the simplicity of structure, low-cost processing, and scalability for use in multifunctional integrated circuits. The well-known theory of MOSFET is first discussed as the general background for modeling the I–V behavior in other kinds of FETs, for example, silicon nanowire (NW), ballistic, and tunneling FETs. An emphasis is placed on highlighting the underlying quantum mechanical concepts.

  19.1 The Modeling of MOSFET I–V

  MOSFET is a three-terminal, normally off, and unipolar device, and its central role consists of electrical switching for the digital logic functions. The device is also extensively utilized as the platform for memory, sensor, and green energy applications and has been downscaled deep into the nanoregime.

  I–V Characteristics

  Thus, consider NMOS consisting of the n+ source and drain on p-type substrate and the n+ polysilicon gate electrode, which is insulated from the substrate via SiO2 (Figure 19.1 ). The source and drain electrodes form with the p substrate n+ –p and p–n+ junctions back to back. Hence, with the gate voltage off ( ) and the drain voltage on ( ), the p–n+ junction at the drain end is reverse biased, cutting off the current (off state). But with V

  G

  on greater than the threshold voltage VT , the junction barrier at the source end is lowered, and electrons are injected from the source into the channel and contribute to the drain current ID . Also shown in the figure are the transistor and transfer ID –VG curves. Each transistor curve consists of triode and saturation regions. In the former, I

  D

  increases linearly or sublinearly with V

  D

  and saturates at a nearly constant level in the latter. The ON to OFF current ratio typically of 106

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  eBook - ePub

  Fundamentals of Nanotransistors

  • Mark Lundstrom(Author)
  • 2017(Publication Date)
  • WSPC

    (Publisher)

  PART 1

  MOSFET Fundamentals

  Passage contains an image

  Lecture 1

  Overview

  1.1 Introduction 1.2 Electronic devices: A very brief history 1.3 Physics of the transistor 1.4 About these lectures 1.5 Summary 1.6 References

  1.1Introduction

  The transistor has been called “the most important invention of the 20th century” [1] . Transistors are everywhere; they are the basic building blocks of electronic systems. As transistor technology advanced, their dimensions were reduced from the micrometer (μm) to the nanometer (nm) scale, so that more and more of them could be included in electronic systems. Today, billions of transistors are in our smartphones, tablet and personal computers, supercomputers, and the other electronic systems that have shaped the world we live in. In addition to their economic importance, transistors are scientifically interesting nano-devices. These lectures aim to present a clear treatment of the essential physics of the nanotransistor. This first lecture introduces the topics we’ll discuss and gives a roadmap for the remaining lectures.

  Figure 1.1 shows the most common transistor in use today, the Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET). On the left is the schematic symbol we use when drawing transistors in a circuit, and on the right is a scanning electron micrograph (SEM) of a silicon MOSFET circa 2000. The transistor consists of a source by which electrons enter the device, a gate, which controls the flow of electrons from the source and across the channel, and a drain through which electrons leave the device. The gate insulator, which separates the gate electrode from the channel, is less than 2 nm thick (less than the diameter of a DNA double helix). The length of the channel was about 100 nm at the turn of the century, and is about 20 nm today. The operation of a nanoscale transistor is interesting scientifically, and the technological importance of transistors is almost impossible to overstate.

  Fig. 1.1 The silicon MOSFET. Left: The circuit schematic of an enhancement mode MOSFET showing the source, drain, gate, and body contacts. The dashed line represents the conductive channel, which is present when a large enough gate voltage is applied. Right: An SEM cross-section of a silicon MOSFET circa 2000. The source, drain, gate, silicon body, and gate insulator are all visible. The channel is the gap between the source and the drain. (Source: Texas Instruments, circa 2000.)

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  eBook - ePub

  Complete Electronics Self-Teaching Guide with Projects

  • Earl Boysen, Harry Kybett(Authors)
  • 2012(Publication Date)
  • Wiley

    (Publisher)

  Chapter 3 Introduction to the Transistor The transistor is undoubtedly the most important modern electronic component because it has enabled great and profound changes in electronics and in your daily lives since its discovery in 1948.

  This chapter introduces the transistor as an electronic component that acts similarly to a simple mechanical switch, and it is actually used as a switch in many modern electronic devices. A transistor can be made to conduct or not conduct an electric current—exactly what a mechanical switch does.

  Most transistors used in electronic circuits are bipolar junction transistors (BJTs), commonly referred to as bipolar transistors junction field effect transistors (JFETs) or metal oxide silicon field effect transistors (MOSFETs). This chapter (along with Chapter 4, “The Transistor Switch,” and Chapter 8, “Transistor Amplifiers”) illustrates how BJTs and JFETs function and how they are used in electronic circuits. Because JFETs and MOSFETs function in similar fashion, MOSFETs are not covered here.

  Projects in this chapter can help you to build a simple one-transistor circuit. You can easily set up this circuit on a home workbench. You should take the time to obtain the few components required, and actually build and operate the circuit.

  In Chapter 4, you continue to study transistor circuits and the operation of the transistor as a switch. In Chapter 8, you learn how a transistor can be made to operate as an amplifier. In this mode, the transistor produces an output that is a magnified version of an input signal, which is useful because many electronic signals require amplification. These chapters taken together present an easy introduction to how transistors function, and how they are used in basic electronic circuits.

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  eBook - ePub

  Electronics

  from Classical to Quantum

  • Michael Olorunfunmi Kolawole(Author)
  • 2020(Publication Date)
  • CRC Press

    (Publisher)

  5 MOS Field-Effect Transistor (MOSFET) Circuits

  As discussed in Chapter 3 , an FET operates as a conducting semiconductor channel with two ohmic contacts; namely, the source and the drain , where the number of charge carriers in the channel is controlled by a third contact called the gate . In the vertical direction, the gate junction (i.e. the gate channel-substrate structure) may be regarded as an orthogonal two-terminal device that is either a metal oxide semiconductor (MOS) structure, or a reverse-biased rectifying device, that controls the mobile charge in the channel by capacitive coupling (field effect). An example of FETs based on these principles is metal-oxide-semiconductor FET (MOSFET; or simply MOS). As briefly noted in Chapter 3 , Section 3.1.1 , there occur several variants of MOSFET (or MOS). In the MOS, “metal” is more commonly a heavily doped polysilicon layer: n + or p + layer. NMOS implies n -type substrate and PMOS implies p -type substrate. The variants of MOSFETs (MOSs) are due to improved technology in devices’ fabrication. Prominent variants are gallium arsenide (GaAs) substrate-based metal-semiconductor FET (MESFET), high-electron mobility transistor (HEMT), and pseudomorphic HEMT (or pHEMT). The main difference between HEMTs and MESFETs is the epitaxial layer structure. In the HEMT structure, compositionally different layers are grown in order to optimize and to extend the performance of the FET. These different layers form heterojunctions since each layer has a different bandgap. These structures are shown in Figure 3.4 , which is reproduced here, as seen in Figure 5.1 .

  FIGURE 5.1 Structure of a basic HEMT (same as Figure 3.4 ).

  Structures grown with the same lattice constant but different bandgaps are referred to as lattice-matched HEMTs. Those structures grown with slightly different lattice constants are called pHEMTs. The MESFETs and HEMTs are grown on a semi-insulating GaAs substrate using molecular beam epitaxy (MBE), or metal–organic chemical vapor deposition (MOCVD), which currently is less common. Epitaxy is the natural or artificial growth of crystals on a crystalline substrate determining their orientation. Other commonly used names for HEMTs include MODFET (modulation-doped FET), TEGFET (two-dimensional electron gas FET), and SDHT (selectively doped heterojunction transistor).

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  eBook - ePub

  Fundamentals of Electronics 1

  Electronic Components and Elementary Functions

  • Pierre Muret(Author)
  • 2017(Publication Date)
  • Wiley-ISTE

    (Publisher)

  Under high-frequency or under rapid switching regime, it becomes necessary to account for junction or gate capacitances. An approximate model consists of replacing the gate-channel capacitances, spread along the entire channel length by two capacitances, gate-source and gate-drain. An output capacitance, located between source and drain, is also typically present due to the connections and the influence of the substrate.

  Figure 3.10.

  Equivalent electrical circuits under dynamic high-frequency or rapid switching regimes

  3.3.2. Other field effect transistors

  3.3.2.1. The high electronic mobility transistor (HEMT)

  In JFETs, MESFETs or MOSFETs, one of the major limitations for the speed of carriers in the channel arises from the collisions between these carriers and the charged centers composed of the doping atoms. In order to eliminate this effect, it is necessary to deport these doping atoms into the gate insulator, which is then made up of another semiconductor, with a larger forbidden bandgap than that of the semiconductor channel, giving rise to a heterojunction. For III–V semiconductors, this can be achieved with near perfect continuity of the crystalline lattice at the interface (Al1-x Gax As/AsGa; Al1-x Gax N/GaN). The carriers flowing into the channel then profit from increased speed while retaining the confinement due to the potential barrier of the heterojunction, which also plays the role of a gate-channel diode with a lower reverse current than in a classical MESFET. These transistors are thus faster (high-frequency applications) due to a higher mobility of carriers in the channel. In silicon MOSFET, this increased mobility can be obtained by placing the channel under mechanical strain according to the crystalline parameters of Si/Gex Si1-x bilayers.

  3.3.2.2. Power MOSFETs and insulated grid bipolar transistor (IGBT)

  The parallel structure at the insulator/semiconductor interface of the channel in the field effect transistors described above suggests that the electric field born by the insulator in the off-state regime is proportional to |VDS – VGS |. This limits voltage VDS to a value compatible with the electric field that the insulator can withstand. We can only increase VDSmax at the expense of an augmented insulator thickness, which leads to a significantly deteriorated transconductance. In order to escape this limitation, a vertical architecture (“D”, “V”, “T” shaped, honeycomb, etc.) is implemented where the source and the gate are positioned on the top surface of the semiconducting wafer while the drain is located on the back-side surface (Figure 3.11 ) or buried and made accessible by means of a notch in the wafer (V-shaped structure). Channel pinching then occurs close to the top surface, although the greater part of VDS is spread along all or part of the weakly doped semiconductive wafer (n– in Figure 3.11 ), which allows for the field to be limited in the insulator and to significantly increase the supported voltage of the component without any loss of transconductance. In this way, we achieve power MOS transistors capable of competing with bipolar power transistors built with the same semiconductor or even to greatly surpass them as far as switching speed is concerned. The parallel use of numerous simple cells such as that in Figure 3.11

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  eBook - ePub

  Fundamentals of Silicon Carbide Technology

  Growth, Characterization, Devices and Applications

  • Tsunenobu Kimoto, James A. Cooper(Authors)
  • 2014(Publication Date)
  • Wiley-IEEE Press

    (Publisher)

  Chapter 8 Unipolar Power Switching Devices 8.1 Junction Field-Effect Transistors (JFETs) We turn now to the first of the three-terminal power devices, the junction field-effect transistor, or JFET. As discussed in Section 7.1, three-terminal power switching devices emulate ideal switches, that is, they attempt to carry high current with minimal voltage drop in the on state and to block high voltages with minimal leakage current in the off state. The basic operation of the JFET can be understood by reference to the schematic cross-section in Figure 8.1. The prototype n-channel JFET consists of two gate regions on either side of an n-type channel region. Each end of the channel is connected to an ohmic contact, designated the source and the drain. A depletion region exists at each gate-channel junction, and the width of this depletion region increases as the square root of the gate-to-channel voltage. Assuming a one-sided step junction, the depletion width can be written 8.1 where is the voltage difference (or Fermi level splitting) between the gate and the channel, is the channel doping, and is the built-in potential (or band bending) of the gate-to-channel junction, given by 8.2 where and are the ionized doping concentrations of the gate and the n-type channel, respectively (see Appendix A for a discussion of incomplete ionization in 4H-SiC. Note that in Equation 8.1 is the total dopant concentration in the channel.) If a non-zero drain voltage is applied and the channel is not pinched-off by the depletion regions from the gate, an electron current will flow from the grounded source to the positive drain, and a voltage drop will exist along the channel from source to drain. Let us designate the voltage at point in the channel as. In this case, and in Equation 8.1 become functions of, and can be written 8.3 Figure 8.1 Schematic cross-section of a basic JFET. The width in the direction into the paper is

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  eBook - ePub

  One-Dimensional Nanostructures

  Principles and Applications

  • Tianyou Zhai, Jiannian Yao(Authors)
  • 2012(Publication Date)
  • Wiley

    (Publisher)

  Chapter 24: One-Dimensional Field-Effect Transistors Joachim Knoch

  RWTH Aachen University, Aachen, Germany

  24.1 Introduction

  In recent years, one-dimensional (1D) nanostructures such as nanowires[1–7] and nanotubes[8–12] have attracted a great deal of attention as building blocks of future nanoelectronic circuits. The interest stems from the fact that the geometric constriction in two dimensions not only leads to higher integration densities of circuits but also results in one-dimensional electronic transport due to quantum confinement. Nanowires consisting of group III–V compound semiconductors and in particular carbon nanotubes have been studied intensively. The latter are particularly attractive because of their geometric compactness (small size), excellent transport properties, and demonstrated capacity for 1D electronic transport at room temperature.

  As will be discussed in detail below, 1D nanostructures offer a number of advantages related to the geometric compactness that ultimately enables the production of ultra-short channel field-effect transistors, and also related to the one-dimensional density of states of these structures, which is beneficial for the performance of FETs.[13]

  24.2 An Introduction To Field-Effect Transistors

  Before discussing the advantages of one-dimensional structures for field-effect transistors, the fundamentals of FETs are briefly stated here to illuminate the differences and the impact of the dimensionality on the performance of MOSFET devices.

  24.2.1 Fundamental Properties of Field-Effect Transistors

  Consider a conventional n-type FET as schematically shown in Figure 24.1 . Figure 24.1 a shows a cross section of the device together with the conduction band along the direction of current transport as well as in the direction perpendicular to it. When a gate voltage is applied, the bands are moved downward allowing charge to be injected into the channel,[14] and a current flows through the device at the same time that a source–drain bias is applied. In order to calculate this current, we consider a device with very short channel length such that the electronic transport through the transistor can be considered as being ballistic. For sufficiently large gate voltages, a triangle-shaped potential between the gate dielectric and the conduction band is obtained. As a result, vertical quantization in the z direction leads to the formation of two-dimensional (2D) subbands (see Figure 24.1

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  eBook - ePub

  Field Effect Transistors, A Comprehensive Overview

  From Basic Concepts to Novel Technologies

  • Pouya Valizadeh(Author)
  • 2016(Publication Date)
  • Wiley

    (Publisher)

  6

  FETs AT MOLECULAR SCALES

  Over the recent years, scaling of the minimum feature size of FETs has rendered the device models developed on the basis of the drift–diffusion carrier-transport formalism less and less applicable. Accordingly, quantum transport foundations are increasingly needed to appreciate the wave nature of electrons in ballistic transport through the short channels of these transistors. The transmission formalism and the use of the nonequilibrium Green’s function1 (NEGF) seem capable of providing a suitable foundation for filling in the gap (i.e., upon inevitable farewell to the drift–diffusion transport formalism). Due to the obligation to address this inevitability, in this closing chapter it seems appropriate to take a departure from the foundations used in explaining the behavior of electronic devices in the previous five chapters and to present a few of the outcomes of this change of paradigm. This chapter is merely aimed at presenting an introduction to the new era of molecular-scale FETs. Such an introduction is expected to open the eyes of students and professionals within the discipline of traditional electron devices on the aforementioned eminent change and to make a bridge between the world of microelectronics, which with a sharp focus on FETs has been dealt with in the first five chapters of this volume, and the new reality of nanoelectronics. A marvelously presented detailed investigation of the NEGF formalism can be found in Datta’s seminal work, which is listed among the references of this chapter.

  6.1 FET: A CHANGE OF PARADIGM

  As we took note in Chapters 3 –5 , gate-length scaling has been the prevalent mode of transformation of FET technologies. Over the past five decades, the gate length of these transistors has gone through a tremendous transformation in scale from tens of microns to about 10 nm. For many generations of MOSFETs, scaling contributed to both increasing the maximum switching frequency of the transistors and the chip’s packing density. However, caused by a number of factors previously enumerated in Chapter 3 , over the past decade or so gate-length scaling has started to yield a diminished gain in terms of the frequency of operation of these transistors. Nevertheless, since scaling has kept contributing to improving the chip’s packing density and as a result to its functionality, chip manufacturers are still aggressively pursuing this trend. Although for many decades scaling had largely remained a mere technological challenge, due to the shrinking length of the channel, approaching the molecular scales heralds a clash between the laws of physics and the operation of FETs as we know them. Quite critically sitting at this juncture is the Heisenberg’s uncertainty principle: you can either have certainty about momentum or position, but not both. Shrinking device dimensions are imposing new limits on certainty of position. However, irrelevant of the gate length at which this hard limit will put a stop to the scaling trend of FETs,2 as long as they are offering the signature characteristic of a tunable resistor, it is still critical to be able to provide a model for understanding the behavior of these deeply scaled

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